The invention covers a computer system with an optimized controller for the display unit of the computer system. The invention further covers a process of optimized access to the display memory of a computer system as well as the use of means of sequencing memory access in a computer system for the sequencing of memory accesses to the display memory of a computer system. The invention can be applied to the control of display units in a multitude of computer systems particularly for the screen control of computer systems which are relatively small and cheap yet powerful and robust, such as mobile applications.
Current technology has control facilities for the display unit of a computer system with connections to a first, primary bus system, as well as connections to a second, secondary bus system. These control facilities for the display unit of a computer system are also frequently called DISPLAY or VIDEO controllers.
The first, primary bus system has a special address and data bus. Using this primary bus system, the control facility controls for the display unit the necessary refresh cycle of the display memory using random access architecture (DRAM, dynamic random access memory), which is also frequently known as VIDEO memory.
The second, secondary bus system also has an address and data bus which connects the control facility for the display unit with the central control unit of the computer system, which is also frequently called the CPU (central processing unit). New display information which has been analysed by the central control unit is written in the display memory via this secondary bus system and/or display data is read from the display memory for current calculations in the central control unit.
Each of the bus systems has a data bus, an address bus and a control bus. These buses can be basically implemented as both bit parallel buses and as bit serial buses. Generally, these bus systems are implemented as bit parallel buses due to the transmission performance required.
Both of these independent bus systems are required to prevent access conflict to the display memory of the central control unit on the one hand, and of the control facility for the display unit on the other. Different CPU and microprocessor families have components which initialise the control facility function for the display unit, such as the VIDEO controller MC 6845 by MOTOROLA from the 6800 microprocessor family, or the VIDEO controller 8275 by INTEL from the 8080 microprocessor family.
In the book by U. Tietze and C. Schenk xe2x80x9cSemi-conductor switching technologyxe2x80x9d (xe2x80x9cHalbleiter-Schaltungstechnikxe2x80x9d), Springer-Verlag, 5th edition, 1990, Berlin-Heidelberg-New York, on pages 526 to 593, the components of a microcomputer system and its functional interfaces are explained. In addition to the block diagram of a microcomputer on page 527, FIG. 21.1, the FIG. 21.54 on page 588 in particular shows an overview of microcomputer peripheral connections such as, for example, the VIDEO controller. These peripheral connections are normally accommodated on the computer system board or on a special push-in card.
Disadvantages of the Current Technology
VIDEO controller components have a large number of connections, particularly bus line connections, due to the bus architecture having a first, primary bus system and a second, secondary bus system. The number of electrical connections, which are often called pins in integrated circuits, have a considerable effect on the manufacturing costs of a component. This large number of electrical connections therefore increases the manufacturing costs of a VIDEO controller.
In addition, electrical components and the associated electrical contacts are frequently a cause of faults in an electrical system, as the electrical contacts do not have sufficiently long-term stability due to dirt, mechanical stress, corrosion, material fatigue and contact erosion, etc. The number of electrical contacts has, therefore, a considerable effect on the functional security of an electrical system. Thus a large number of electrical contacts increases the susceptibility to faults of a VIDEO controller.
In addition, the requirement of having two bus systems means considerable expenditure due to material costs and the installation costs of the second bus system. In addition, a second bus, system requires additional space, both on a board in the computer system and also in the housing of the computer system.
Task
The invention is based on the task of developing a VIDEO controller which requires a low number of electrical contacts.
Solution to the Task
This task is solved by the invention through a device which has the characteristics shown in Claim 1.
There are advantages in that through the connection of the central control unit, the control facility for the display unit and the display memory to the common system bus only one bus system is required, and all electrical connections which were required for the primary bus system under current levels of technology no longer apply. In this way, there is a significant and advantageous reduction in the number of electrical connections on the control facility for the display unit. This means not only an advantage in costs but also the advantage of increased reliability in the computer system.
There are further advantages in that a complete bus system can be saved, which again means cost advantages for the computer system through savings in material costs and installation costs for the second bus system. In addition, there is an advantage in saving a complete bus system in that space is saved on the board of the computer system as well as in the computer system housing, which will make the computer smaller and lighter.
Yet another advantage is that in addition to a bus system, the associated driver blocks and buffer blocks can also be saved, which means not only a reduction in costs but also a lower consumption of energy.
Another advantage is that through the means of sequencing memory accesses, correct and valid access to the display memory, and in particular data integrity is guaranteed. These means of sequencing memory accesses make sure that only one component of the computer, the central control unit or the control facility for the display unit, can access the display memory. Thus collisions in memory access are advantageously avoided. The components which can access the display memory use the system bus for this.
The central control unit of the computer can be a CPU (central processing unit), a microprocessor or a microcontroller, for example. The display unit can be a cathode-ray tube, an active or passive liquid crystal display, a gas plasma panel, a field emitting cathode display or any other display facility.
The means of sequencing the memory accesses can, for example, be realised using separate control lines, which connect the components which want to access the system bus to the central control facility. Each time a component wants to access the bus, it sends a signal via the separate control line and in this way requests the right-to-access the bus (BUS REQUEST). The bus access is released by another signal (BUS RELEASE). These separate control lines can be designed as open common collectors or as open common drains.
In a similar way, the means of sequencing the memory accesses can be realised through a design which touches on the process of direct memory access (DMA) or on multi-master bus design. These designs are described in the current state of technology above (U. Tietze and C. Schenk: xe2x80x9cSemi conductor switching technologyxe2x80x9d (xe2x80x9cHalbleiter-Schaltungstechnikxe2x80x9d), Springer-Verlag, 5th edition, 1990, Berlin-Heidelberg-New York).
In addition, other means of sequencing memory access is possible, such as right-to-access using a token procedure linked with an electronic token, the possession of which gives the right of access, or through a central control unit which distributes bus access, or through a hierarchical structure of components with regard to the right-of-access to the bus, with bus access issued according to a prescribed scheme of priority.
Normally, a work data memory is connected to the system bus, and this is usually a memory with optional access (RAM, random access memory), either as a static memory (SRAM) or as a dynamic memory (DRAM). In addition, a read-only memory (ROM) is often connected to the system bus of the computer. The display memory is normally a memory with optional access (RAM, random access memory), a dynamic memory (DRAM) for example.
In one form of the invention, the device has the characteristics of Claims 2 and 3.
Here it is advantageous that through the use of a video memory (VRAM) with dual port architecture, the additional serial access memory of which is frequently known as SAM (serial access memory), a considerable reduction in access cycles is achieved on the part of the control facility for the display unit. With the additional serial access memory of the VRAM, it can also deal with a separable, serial access memory, frequently known as SPLIT-SAM. This serial access memory transfers the stored data to the display unit via the data line.
At each memory access, a whole lot of display data for the display unit is advantageously transferred to the SAM or SPLIT-SAM, and from there routed to the display unit. Through this reduction in memory accesses for the purpose of displaying display data, these transfer memory accesses can be interconnected very advantageously with the write/read process of the central control unit. By using display memories with a separable, serial access memory, the memory accesses for the display of display data can be reduced, for example, to 1/256.
It is advantageous that through determining priorities for memory access of the control facility for the display unit to one particular time, fault-free display building in the display unit is guaranteed and at that particular time a fault-free display corresponding to the current contents of the display memory can be displayed. In particular, the priority can be determined in such a way that the control facility for the display unit occupies the system bus whenever it is necessary and, if necessary, the central control unit must wait for the release of the system bus.
It is advantageous that the control facility for the display unit is integrated in one component of the computer which is also connected to the system bus, as this guarantees a further reduction in the number of electrical connections and contacts. The component in which the control facility for the display unit is integrated already has a system bus connection and therefore no further connections for the control facility for the display unit are required. In addition, space requirements for the control facility on the computer board is reduced by the integration of the control facility for the display unit, resulting in savings in weight and manufacturing costs. Equally, the reliability of the computer is increased, as the number of components in the computer is reduced.
It is advantageous that the integration of the control facility for the display unit in the central control unit of the computer further simplifies the sequencing of memory accesses. In this, the number of electrical connections required is further reduced, and thereby provides an economical and reliable solution. In addition, integration offers increased processing speed as all signals are supplied on one single electric circuit. In particular, the means of sequencing can be integrated advantageously in the central control unit and thus the total functionality of the central control unit and the control facility for the display unit can be realised economically, compactly and reliably in one component with minimum delay time.
It is advantageous that the PowerPC microcontroller is particularly suitable for processing control tasks at high speed due to its RISC architecture; the integration of the control facility for the display unit of a computer, as in the invention, can be achieved with low costs and minimal developmental effort and guarantees reliable and economical operation. The PowerPC microcontroller is part of the PowerPC processor family, a family of modern and high-powered microprocessors and micrcontrollers. The PowerPC microcontroller can be acquired through IBM Deutschland Sales or through the IBM Corporation.
It is advantageous that in addition to the control facility for the display unit in the invention, other functions can be integrated simultaneously on a common function platform, for example, in the case of a motor vehicle this might be engine control, air conditioning control, navigation, display units as well as audio and video applications. The function platform has, for example, in addition to a PowerPC microcontroller with an integrated hierarchical processor architecture, DRAM memory and display units as well as bus drivers and bus interfaces for different data buses.
It is advantageous that on the central control unit accessing data in the display memory via the system bus, and by the control facility for the display unit also accessing the display memory using the system bus, only one bus system is required, and all electrical connections which are required for the primary bus system in the current state of technology are no longer needed. In this way the number of electrical connections of the control facility for the display unit can be advantageously and significantly reduced. In addition to advantages in costs, this also means increased reliability in the computer.
There is an additional advantage in that a complete bus system can be saved which again means cost advantages in savings in material costs and installation costs of the second bus system for the computer. A further advantage is that in saving a complete bus system, space is saved on the board as well as in the computer housing, which will make the computer both smaller and lighter.
A further advantage is that in addition to savings on a bus system, the associated driver and buffer blocks can be saved, which means not only savings in costs but also a lower consumption in energy.
Another advantage is that through the means of sequencing memory accesses, correct and valid access to the display memory, and in particular data integrity is guaranteed. The sequencing of memory accesses makes sure that only one component of the computer, the central control unit or the control facility for the display unit can access the display memory. Thus collisions in memory access are advantageously avoided The components which can access the display memory use the system bus for this.
It is advantageous that by using VR display memories with a separable, serial access memory, frequently known as a SPLIT-SAM, the accesses to the display memory for the display of display data on the display unit are considerably reduced, and that by allowing priority to the memory accesses of the control facility for the display unit at a particular time, fault-free display building is guaranteed the display unit and at any one time a fault-free display corresponding to the current contents of the display memory can be displayed.
It is advantageous that the use of means for sequencing memory accesses guarantees dealing with memory accesses of a central control unit and memory accesses of a control facility for a display unit to the display memory in a computer via a common system bus, and connects the control unit, the control facility for the display unit and the display memory to the system bus of the computer, so that a further bus system as required under the current state of technology can be saved. Thus a computer can advantageously be made with savings in space and weight, which can be manufactured economically and can guarantee fast processing speeds and a high level of reliability.
The display memory can be, for example, a video memory with optional access (VRAM) with a separable, serial access memory (SPLIT-SAM). Sequencing can allow the display memory priority in access to the control facility for the display unit and buffer memory access of the central control unit to data in the display memory, in case the central control unit temporarily has no right-of-access.
It is advantageous that by using a system bus in a computer to transmit accesses of the central control unit and accesses of the control facility for the display unit to the display memory, an additional bus system as required under the current state of technology can be saved. Thus a computer can advantageously be made with savings in space and weight, which can be manufactured economically and can guarantee fast processing speeds and a high level of reliability.